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MRF89XA
TABLE 2-6:
CONFIGURATION/CONTROL/STATUS REGISTER DESCRIPTION
General Configuration Registers: Size – 13 Bytes, Start Address – 0x00
Register
Address
0x00
Register
Name
GCONREG
Register Description
General Configuration Register
Related Control Functions
Transceiver mode, frequency band
selection, VCO trimming, PLL frequency
dividers selection
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
DMODREG
FDEVREG
BRSREG
FLTHREG
FIFOCREG
R1CREG
P1CREG
S1CREG
R2CREG
P2CREG
S2CREG
PACREG
Data and Modulation Configuration
Register
Frequency Deviation Control Register
Bit Rate Set Register
Floor Threshold Control Register
FIFO Configuration Register
R1 Counter Set Register
P1 Counter Set Register
S1 Counter Set Register
R2 Counter Set Register
P2 Counter Set Register
S2 Counter Set Register
Power Amplifier Control Register
Modulation type, Data mode, OOK
threshold type, IF gain
Frequency deviation in FSK Transmit mode
Operational bit rate
Floor threshold in OOK Receive mode
FIFO size and threshold
Value input for R1 counter
Value input for P1 counter
Value input for S1 counter
Value input for R2 counter
Value input for P2 counter
Value input for S2 counter
Ramp Control of PA regulator output
voltage in OOK
Interrupt Configuration Registers: Size – 3 Bytes, Start Address – 0x0D
Register
Address
0x0D
Register
Name
FTXRXIREG
Register Description
FIFO, Transmit and Receive Interrupt
Request Configuration Register
Related Control Functions
Interrupt request (IRQ0 and IRQ1) in
Receive mode, interrupt request (IRQ1) in
Transmit mode, interrupt request for FIFO
full, empty and overrun
0x0E
FTPRIREG
FIFO Transmit PLL and RSSI Interrupt
Configuration Register
FIFO fill method, FIFO fill, interrupt request
(IRQ0) for transmit start, interrupt request
for RSSI, PLL lock enable and status
0x0F
RSTHIREG
RSSI Threshold Interrupt Request
RSSI threshold for interrupt
Configuration Register
Receiver Configuration Registers: Size – 6 Bytes, Start Address – 0x10
Register
Address
0x10
Register
Name
FILCREG
Register Description
Filter Configuration Register
Related Control Functions
Passive filter bandwidth selection, sets the
receiver bandwidth
(Butterworth filter)
0x11
PFCREG
Polyphase Filter Configuration Register
Selects the central frequency of the
polyphase filter
0x12
SYNCREG
Sync Control Register
Enables polyphase filter (in OOK receive
mode, bit synchronizer control, Sync word
recognition, Sync word size, Sync word
error
0x13
RESVREG
Reserved Register
Reserved for future use
DS70622C-page 28
Preliminary
? 2010–2011 Microchip Technology Inc.
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